Responsible for promoting various measures to strengthen information security for PFN and its affiliates.
About this role
This is a chip verification engineering role on the team responsible for the MN-Core series, an AI accelerator line. The work sits at the boundary of software and hardware verification: HDL-based hardware designs must be checked against their specifications before later development makes changes difficult. The engineer contributes to verification for new architectures and to bringing new chips into use.
The day-to-day work includes implementing verification programs, assemblers, software simulators, and high-performance application kernels for new architectures. It also covers maintaining verification environments and CI infrastructure, bringing up new chips, and evaluating samples; the role may extend to defining hardware specifications. Applicants need a basic university-level understanding of computer science and must be able to work flexibly in an environment where English and Japanese are mixed.
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